Teoria układów logicznych

Check SST solvability

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
Pobrań: 0
Wyświetleń: 2912

Check SST solvability When SST is ready, solvability analysis have to be done. We search for repeating in N.S.U. (numerical state of the system) and check, if for selected number repeating appears to have the same or different working conditions...

Klasyfikacja urządzeń bistabilnych

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
Pobrań: 7
Wyświetleń: 2912

Classification of bistable devices A bistable element of flip-flop is a sequential logic device that has two and only two stable output states. In general bistable elements can be divided into two categories: 1. asynchronous devices (called basic latches) 2. synchronous devices. In turn, synchr...

Kody i kod przetwornic

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
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Wyświetleń: 2793

Codes and code converters Coding is an action of assigning some symbols to different information. The set of symbols is called a code and a code using all possible combinations of symbols is called a complete code. Codes that represent decimal numbers as binary are called binary-decimal. The mos...

Demultiplexer

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
Pobrań: 7
Wyświetleń: 3171

Demultiplexer A Demultiplexer (DMUX) is a circuit that receives a signal on a single input line and directs that signal to one of 2n possible output lines. If the enable input is active, we can also call this circuit a n-to2n Decoder. A block diagram of 1-to-4 line Demultiplexer is shown in Fig. ...

Dynamika układów przełączających

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
Pobrań: 14
Wyświetleń: 3290

Dynamics of switching circuits While thinking about real switching devices one has to take into consideration that unlike ideal circuits they posses the property of having two states: stable and unstable. What's more, all logical elements such as gates, flip-flops, require some time (called propa...

Wprowadzenie definicji funkcji

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
Pobrań: 7
Wyświetleń: 1050

Entering function definition Function may be entered in two forms: • Canonical numerical decimal representation, • Literal representation. In canonical numerical representation function definition can be entered by proceeding menu steps File ⇒ New function ⇒ Canonical representation or by click...

Podstawowe zagrożenia w kolejnych obwodach

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
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Wyświetleń: 1085

Essential hazards in sequential circuits Essential hazards are a result of unequal signal delay paths that exist in a circuit and they cause the transition to the stable state unpredicted by the circuit programme. They may occur when a signal and its complementation drive a

Zagrożenia w układach kombinowanych

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
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Wyświetleń: 1232

Hazards in combinational circuits Hazards in combinational circuits occur as momentary errors on the output and are the result of delay time introduced by the use of some gates in implementation of a function, as shown in the picture below. There are two main types of hazards: static and dynamic...

Wyścigi w kolejnych obwodach

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
Pobrań: 0
Wyświetleń: 1148

Races in sequential circuits Races in sequential switching circuits occur when the circuit programme requires the transition between two states, the codes of which are not logically adjacent - i.e. they differ in more than one bit. It means that a race may happen only when for describing internal...

Rejestry - Registers

  • Politechnika Śląska
  • dr inż. Piotr Czekalski
  • Teoria układów logicznych
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Wyświetleń: 1204

Registers Registers are such sequential circuits that their purpose is storing information. The main parameters that characterise a register are its length (equal to the number of flip-flops used in the construction) and the way of first loading data into it, then reading it. If for loading data...