Implementing for Type 1. A type 1 MUX design requires one signal to be partitioned off. Continuing with the same function
F, the truth table is now drawn and partitioned as shown in Fig. 10.The select inputs are
independent signals a,b,c, and the data inputs are the values (the subfunctions) in the truth table.
The reduced output column in Fig. 10 represents the output states as function of the partitionedoff
input signal d. The reduced outputs in the truth table consist of a set of subfunctions of the
signal that is partitioned off in the truth table. In this case, eight subfunctions are required where
each subfunction is written as function of d, that is, F(d). The implementation for type 1
Multiplexer design is shown in Fig. 11.
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