Syntthesiis off a combiinattiionall swiittchiing ciircuiitt The aim of a synthesis of a combinational circuit is to obtain the output functions and then a logical diagram of the circuit when given its algorithm of work. The output functions of the circuit may be i n different forms but they should always be optimal, taking into consideration the type and the number of switching devices used for implementation. The stages of designing process are as follows: 1. Obtaining the algorithm of work for the circuit, basing on logical statements or a timing chart illustrating working conditions. 2. Creating truth tables or Karnaugh maps for the output functions. 3. Obtaining the canonical forms for the output functions. 4. Obtaining the minimal output functions. 5. Obtaining the output functions in forms adequate to implementation. 6. Obtaining a logical diagram. Depending on a set of elements used for implementation, some stages of this process are not required. For example, to implement a function using multiplexer or demultiplexer the minimal form of a function is not necessary (such implementation is described in Exercise 11). Minimisation process may base on one of several methods, such as transformations of a logical expression, using Karnaugh maps, Quine - McClusky's method, etc. For functions with a great number of variables (this “greatness” is, of course, relative), especially those that are weakly specified, we may use Kazakov method (described in Exercise 12&13). The most commonly used are, however, Karnaugh maps (for up to 6 variables) as offering very convenient representation of a function.
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